As transistor sizes continue to be scaled to smaller and smaller dimensions, different types of ultra thin-body transistor structures have been proposed. For example, double gated transistors permit twice the drive current and have an inherent coupling between the gates and channel that makes the design amenable to scaling.
With reduced size gate lengths, many transistors have difficulty in maintaining high drive current with low leakage while not demonstrating short-channel effects such as leakage and threshold voltage stability. Bulk silicon planar CMOS transistors typically overcome these problems by scaling polysilicon gates and oxides, using super-steep retrograde wells (often triple wells), abrupt source/drain junctions and highly doped channels. At some point, however, intense channel doping begins to degrade carrier mobility and junction characteristics.
As the length of transistor gates become ever smaller, electrostatic control of the resulting short transistor channel by the gate electrode becomes difficult. In particular, control of off-state leakage current between the source and the drain is reduced. As channel lengths are reduced, others have increased channel implants of conventional planar single-gated bulk or partially-depleted SOI (silicon on insulator) devices to improve control of electrons in the short transistor channel and reduce off-state current leakage. Unfortunately, significantly increasing the doping of the transistor's channel causes severe degradation of the channel electron mobility and thus leads to reduced transistor drive current. Other transistor structures have been proposed that improve the electrostatic control over the source/drain current leakage through a thin body structure and enhance electrostatic influence of the gate on carriers (holes or electrons) in the transistor channel. Such transistor structures include undoped ultra-thin channel devices like single-gate and multiple-gate fully-depleted devices with undoped ultra-thin channels. Multiple gate fully-depleted transistors provide the best short-channel control. The two gates control roughly twice as much current as a single gate, which allows them to produce significantly stronger switching signals. The two-gate design provides inherent electrostatic and hot-carrier coupling in the channel. This intimate coupling between the gates and channel makes double-gated MOSFET technology one of the most scalable of all FET designs.
The FINFET transistor is a double-gated MOSFET (MOS field effect transistor) device wherein the gate structure wraps around a thin silicon body that forms a structure resembling a fin. The FINFET includes a forward protruding source and a backward protruding drain, both of which extend from the gate by an extension region which is the fin. Forming the extension region or the fin is a major issue because ion implantation of the source and drain regions may cause significant damage to the extension region since is it thin and subject to full penetration by implanted ions. In particular, the ion implantation may fully amporphize the extension region resulting in a polycrystalline extension region rather than single crystalline which degrades the carrier mobility and lowers the drive current.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.